Closed seblovett closed 10 years ago
Found an issue with using the defined listing style for System Verilog. It seems to have a problem with the xcolor package. To reproduce - include the definitions.tex file, and add style=sverilog to the listing in CPU_Test.tex.
style=sverilog
Found an issue with using the defined listing style for System Verilog. It seems to have a problem with the xcolor package. To reproduce - include the definitions.tex file, and add
style=sverilogto the listing in CPU_Test.tex.