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seblovett / VLSI

VLSI design project
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CFlag optimise? #95

Closed ashleyjr closed 10 years ago

ashleyjr commented 10 years ago

We have 'StatusReg' as a 4 bit output and another output 'CFlag' but this is just one bit of 'StatusReg'.

Should CFlag be removed? @seblovett I think this would require jiggery-pokery in the layout, might not be worth the effort

seblovett commented 10 years ago

I hadn't spotted that. It will synthesis to a wire within the control, so really it would be a shift of wires from inside the control unit to outside. So not really worth it. Good find though.

ashleyjr commented 10 years ago

Fair, I agree