Assembler Broken

[seblovett]

Nothing is assembling. It's a traceback, not an error code.

Get this for multiply, factorial and random:

>$ assemble.py multiply
--------Converting File multiply.py--------

--------Interpreting Syntax-----------
Done
--------Locating ISR----------
--------Creating Link Table----------
Traceback (most recent call last):
  File "/home/hl13g10/VLSI/bin/assemble.py", line 389, in ?
    distance = branch(line[1], i, 0)
IndexError: list index out of range

Different for Interrupt:

>$ assemble.py interrupt 
--------Converting File interrupt.py--------

--------Interpreting Syntax-----------
Done
--------Locating ISR----------
info: ISR Recognized - line  15 , length  42
      asm file line 15 ['DISI']
      asm file line 16 ['STF']
      asm file line 17 ['PUSH', 'R0']
      asm file line 18 ['LUI', 'R0', '160']
      asm file line 19 ['LLI', 'R0', '0']
      asm file line 20 ['LDW', 'R0', 'R0', '0']
      asm file line 21 ['ENAI']
      asm file line 22 ['PUSH', 'R1']
      asm file line 23 ['PUSH', 'R2']
      asm file line 24 ['PUSH', 'R3']
      asm file line 25 ['PUSH', 'R4']
      asm file line 26 ['LUI', 'R1', '2']
      asm file line 27 ['LLI', 'R1', '0']
      asm file line 28 ['LDW', 'R2', 'R1', '0']
      asm file line 29 ['ADDI', 'R3', 'R1', '1']
      asm file line 30 ['LDW', 'R4', 'R3', '0']
      asm file line 31 ['SUBIB', 'R2', '1']
      asm file line 32 ['CMP', 'R4', 'R2']
      asm file line 33 ['BE', '.isrOut']
      asm file line 34 ['ADDIB', 'R2', '1']
      asm file line 35 ['LUI', 'R1', '2']
      asm file line 36 ['LLI', 'R1', '2']
      asm file line 37 ['CMP', 'R2', 'R1']
      asm file line 38 ['BNE', '.write']
      asm file line 39 ['ADDIB', 'R1', '3']
      asm file line 40 ['CMP', 'R4', 'R1']
      asm file line 41 ['BE', '.isrOut']
      asm file line 42 ['.write', 'STW', 'R0', 'R4', '0']
      asm file line 43 ['ADDIB', 'R4', '1']
      asm file line 44 ['LUI', 'R1', '2']
      asm file line 45 ['LLI', 'R1', '6']
      asm file line 46 ['CMP', 'R1', 'R4']
      asm file line 47 ['BNE', '.wrapW']
      asm file line 48 ['SUBIB', 'R4', '4']
      asm file line 49 ['.wrapW', 'STW', 'R4', 'R3', '0']
      asm file line 50 ['.isrOut', 'POP', 'R4']
      asm file line 51 ['POP', 'R3']
      asm file line 52 ['POP', 'R2']
      asm file line 53 ['POP', 'R1']
      asm file line 54 ['POP', 'R0']
      asm file line 55 ['LDF']
      asm file line 56 ['RETI']
Traceback (most recent call last):
  File "/home/hl13g10/VLSI/bin/assemble.py", line 348, in ?
    if (l[0] == 'LUI') & (l[1] == 'R7'):
IndexError: list index out of range

[mw92]

will fix today

[seblovett]

Thanks.

[mw92]

fixed and uploaded

[seblovett]

Assembler now runs, but is funtctionally incorrect. It looks like the ISR is being placed at location 12 in memory, not 16. In the interrupt program, the program flow runs straight into this, and then the RETI fails and breaks the CPU.

[seblovett]

To replicate, run sim.py -p interrupt -g. It will stop automatically when it breaks.

[mw92]

fixed

[seblovett]

Still not working. Not 100% sure what's going on, but we're ending up in the ISR when we shouldn't, causing the RETI instruction to execute and things go wrong. It seems to match up to the jump over the ISR, the Jump looks like it's going to the wrong place, or that the instruction at the jump is not correct. A BE occurs backwards, and I think that's how we end up in the ISR.

[mw92]

fixed that now aswell it was jumping to last line of ISR not over of it

[seblovett]

I understand your point about the stack pointer now. I see you have pushed R0 so you can use it for the jump. However, you don't restore this. Some of the instructions are not being executed - i.e. the ENAI never gets executed. Still getting the same issue with RETI being executed too.

[mw92]

There is a line added after ISR "POP R0" to restore

[seblovett]

Okay, didn't see that.

[mw92]

you mean ENAI on 7th line of ISR?

[seblovett]

No the ENAI at location 13

DISI            ; Reset is off anyway   
LUI R7, #7
LLI R7, #208
LUI R0, #2      ; R0 is read ptr    0x0200
LLI R0, #0
ADDI R1,R0,#2   ; 0x0202
STW R1,[R0,#0]  ; Read ptr set to   0x0202          
STW R1,[R0,#1]  ; Write ptr set to  0x0202
LUI R0,#160     ; Address of Serial control reg
LLI R0,#1
LUI R1,#0
LLI R1,#1       ; Data to enable ints
STW R1,[R0,#0]  ; Store 0x001 @ 0xA001
ENAI
BR .main
.isr    DISI .....

[mw92]

I dont see why it wouldnt. run assembler by itself in Assembler folder for interrupt.asm and see output The "After Preprocessing" list makes sense to me Lines 12-58 are from ISR placement, with 16-57 being the actual ISR

[mw92]

Normal program flow will go 10 -> 11 -> 59 -> 60 ->...

[seblovett]

All instructions should be completed here up to and including 14. (in the asm) Should go 13->14->59 ... Why would instructions 12-14 be missed out?

[mw92]

im not talking about the .asm line numbers the output from assembler gives post processing assembly readout

[seblovett]

Even still, I don't understand why it would jump from 11 to wherever.

[mw92]

Refering to After Preprossessing, not asm file 0-11 normal program 12-15 setup and perform jump over isr 16-57 ISR 58 restore register 59+ normal program

[seblovett]

Okay, fair dos. It's currently going 14->15->43->44

[seblovett]

(of actual hex)

[mw92]

ok fixed again, forgot when I wrote it that JMP was not a relative branch

[seblovett]

Seems to be working now. Thanks

[ashleyjr]

@mw92 The reason for #99 is the the isr region JMP just sets the SP to 0x7FF but this shouldn’t be hard coded in the assembler, the programmer should define this value

[ashleyjr]

@mw92 I see in the assembler you look for a stack pointer setup using "LUI R7,#x \n LLI R7,#y" but I used SP in broken program which explains why that fails.

However when the SP is not set it just uses 0x07FF which could be an invalid memory address in practice. I can't think of a way to do a jump without destroying data, maybe we'll just have to keep the first 16 lines of code blank?

[mw92]

To jump over isr the stack pointer must be defined to an initial value, from what I understand 0x07FF is the first address in available memory so it is set to that if not defined in user's code. What do you mean by broken program? Keeping first 16 lines blank is wasteful, one alternative I can think of is setting SP to 0x0001, which will be valid so long as some memory is connected and allows enough space for one register to be saved.

[ashleyjr]

• The memory in our model has the highest address of 0x07FF but if the processor is to be used with other type of memory this value might be smaller, you can't assume a memory size. Iain has also told me to use 0x0700 to init the stack pointer.
• The program I referenced, #99
• I like that, so the first op is a relative branch over temp stack space?

[seblovett]

But if there is no ISR, then no moving around of anything should occur surely?

SP to 1 will overwrite some of the program (unless you put some blank space in there during assembly). Maybe just doing the jump is the best way forward in the first. It's wasteful, but this gives us something to discuss in our report. And my apologies Martin, I recall us having this discussion before and me telling you not to be wasteful, however I didn't fully comprehend the issue at the time. We'll have a chat about this at 3 today.

[mw92]

Ive just adjusted it so the SP is set to the location in memory just after the program, if this is an invalid space the program would have no data space. Therefore would break anyway. Ive also set program to add one line ISR when there isnt one which is simply a 'RETI'.

[seblovett]

It's broken things again.

[mw92]

whats it done?

[seblovett]

Trying to work out what exactly isn't working.

[seblovett]

In interrupt - we're going 0 -> 1 ... 15 -> 17-> ... Hits RETI and goes back to 0000.

[seblovett]

Also "Ive just adjusted it so the SP is set to the location in memory just after the program, if this is an invalid space the program would have no data space. Therefore would break anyway. " There is nothing to say that the memory cannot be later increased. Our CPU is general purpose. It has to cope with larger and smaller memories. What if it is a Von Neumann architecture where program and data are separate?

[mw92]

There is no checking, was just making my point for using the address just after the program. Harvard has separate data and instruction memory, but our system can only be von neumann since there is only one connection to memory.

[seblovett]

I was merely stating that we cannot guarantee that the location directly after the program is available. Or writable.

[mw92]

now changed it AGAIN so that it does not use the stack. Instead location 15 is used as a dud instruction for a temporary context save of R0. However it will throw an error if the first 11 lines manage to use every GPR.

[seblovett]

thanks, Interrupt and Multiply are okay. Factorial and Random programs are not working still. Looking at why.

[seblovett]

Factorial works when you don't try calculate the factorial of 2000.... My herp derp on that one!

[mw92]

lol well done Henry....

[seblovett]

:) Random still isn't working though! Seeming we're getting some X's finding their way into the registers. @ashleyjr can you have a look at this. I'm wanting to do a go through of the programmers guide before the meeting.

[ashleyjr]

@seblovett I'll be in labs in 10 mins

[seblovett]

:+1: I'll save you a seat.

[mw92]

I dont see the problem, when I run random with sim.py it just gives a stream of random numbers

[ashleyjr]

Extra thing: LSL R0,R0,#16 is allowed by the assembler