sifive / duh-bus

🚌 Bus definition DUH documents
https://github.com/sifive/duh
Apache License 2.0
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interrupt bus definition #11

Closed albertchen-sifive closed 4 years ago

albertchen-sifive commented 4 years ago

for example block-pio-sifive defines irq nodes https://github.com/sifive/block-pio-sifive/blob/master/docs/pio.json5#L163-L171 and duh-scala emits scala code for it https://github.com/sifive/duh-scala/blob/master/lib/intc-tl.js but there is no bus definition

drom commented 4 years ago

The current way of mapping of ports to sifive.com/free/interrupts/0.1.0 bus is impossible to express in busDef

{
  name: 'irq',
  interfaceMode: 'master',
  busType: {vendor: 'sifive.com', library: 'free', name: 'interrupts', version: '0.1.0'},
  abstractionTypes: [{
    viewRef: 'RTLview',
    portMaps: [
      'irq0',
      'irq1'
    ]
  }]
}

A proposed way:

...
    portMaps: {
      IRQ: ['irq0', 'irq1']
    }
...

This way, concatenation of Interrupt Requests (IRQ) can be collected into a single uniform bundle.

drom commented 4 years ago

Related: https://github.com/sifive/duh-bus/pull/17

drom commented 4 years ago

merged