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sifive / duh

👾 Design ∪ Hardware
https://observablehq.com/@drom/duh-intro
Apache License 2.0
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inout verilog import - width missing #58

Closed drom closed 4 years ago

drom commented 5 years ago

When importing inout a of 1 bit width. width attribute is missing in duh file.

Ramlakshmi3733 commented 4 years ago

is this issue connected to #37?

Ramlakshmi3733 commented 4 years ago

should we assume a bit width of 1 as a default?

drom commented 4 years ago

explicit width property is required. https://github.com/sifive/duh-schema/blob/master/lib/component.js#L17

Ramlakshmi3733 commented 4 years ago

closing the issue as it is an issue with a missing parameter, width