Update BSP files to change the clock-frequency to 1 GHz, because we have supported PRCI driver to simply initialize the core PLL, so we adjust the clock-frequency here, rather than all cores execute the program running directly off of the external clock input, expected to be at 33.3 MHz, otherwise, peripherals won't work because they should operate in a single clock domain running at 'coreclk/2' rate.
Update BSP files to change the clock-frequency to 1 GHz, because we have supported PRCI driver to simply initialize the core PLL, so we adjust the clock-frequency here, rather than all cores execute the program running directly off of the external clock input, expected to be at 33.3 MHz, otherwise, peripherals won't work because they should operate in a single clock domain running at 'coreclk/2' rate.