simoneruffini / NORM

Framework for emulation of non volatile memory using off-the-shelf FPGAs
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vol_cntr1_pa_val in fsm_nv_reg_db false triggers #9

Open simoneruffini opened 3 years ago

simoneruffini commented 3 years ago

The volatile counter power approximator triggers improperly during runtime (only for fsmn_nv_reg_DB policy). This causes miscalculation of the power approximation visible in the report.

The bug is caused by the fact that: 1)vol_cntr1_pa_val triggers when fsm_nv_reg_state = do_operation_s 2) When the machine is in hazard state (voltage trace level below hazard threshold level) a data save is performed. But after that the machine goes back to do_operation_s even if the system is still in hazard.

Possible solution Add an additional state to fsm_nv_reg_DB that precedes do_operation_s and that is in charge to check the voltage level against defined thresholds. This state will then direct the fsm to the right operation and will be the sink for all of them after completion.