Open simoninns opened 5 years ago
VHS doesn't need anywhere near 40msps to work effectively, so there's definitely enough bandwidth there.
Good point - since the ADC filter is fixed, the FPGA could be used to decimate the sample in software (to lower the sample rate without changing the ADC clock) - which would then keep the design more universal.
Just thought I would add a footnote
Mimimum Resampled:
Mimium Recommended:
While mimium sampling is great for post space saving oversamping for VHS is plus in the event of dropouts or out of spec signals.
Video8 / Hi8 fall into 28msps safe relm and are 1 RF tap capture formats.
Just going to note the new adc_usb3 / SMIRF (Now called the MISRC), its in a very dev board work in progress state and software/audio boards are a work in progress aswell, but it has great potential.
Cost: 150 Euro +- 25 Euro - JLCPCB/PCBway direct fabrication
PCB: 20-30USD / Parts 50-70USD
Features:
For use with VHS tape systems (and other capture scenarios where there are dual sources of analogue data), it would be useful for the duplicator board to provide 2 synchronised channels of ADC running from the same sample clock.
This would need some testing though as it's not clear if the USB3 can sustain 2 40MSPS streams (testing so far has been up to 75MSPS).