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sinara-hw / 12G_AWG

12GHz FMC AWG card
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AD9166 Vector Signal Generator #1

Open dtcallcock opened 3 years ago

dtcallcock commented 3 years ago

Cool new silicon: https://www.analog.com/media/en/technical-documentation/data-sheets/ad9166.pdf

Not dug into it too much, but could offer a one-chip solution for much of the Phaser functionality.

gkasprow commented 3 years ago

Interesting chip. It could replace the upconverters and simplify it a bit. But it requires JESD-capable FPGA. Moreover it would be much more expensive (two such DDS chips , 500$ each + stronger FPGA (+1k$). Each of them consumes 5W of power. I see it as an RTM for Sayma. If somebody wants to use them, it's easiest to buy an FMC devkit (<1k$) and plug it to AFCK. We are currently preparing upgrade of AFCK that will support Kintex US chip and full DRTIO/ARTIQ support. Existing AFCK will also work.

dtcallcock commented 3 years ago

You make a good case for why it probably wouldn't make sense to redesign Phaser around this chip. Moving issue to Meta and leaving open though is it clearly has unique capabilities relevant to Sinara.

dhslichter commented 3 years ago

I would say that this chip could be how one would build ARTIQ hardware for superconducting qubit applications, if not using an RFSoC. If one made a Sayma RTM targeted to sc qubits, that could be interesting. A major consideration with sc qubits, though, is round-trip latency, which is generally problematic with JESD. The datasheet is also a bit cagey about the ability to achieve true deterministic latency, which is essential (what part of "within several device clock cycles" is "deterministic"?).
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dtcallcock commented 3 years ago

Without digging too deeply into capabilities, at $4k/40W for 8-channels, how does it compare to the ZU27DR you are using on RFSoC-AMC @gkasprow?

A major consideration with sc qubits, though, is round-trip latency, which is generally problematic with JESD.

Yes, I understood that JESD was a no-go for SC qubits.

gkasprow commented 3 years ago

RFSOC is 10k for 8 channels. They upgraded it to 10GS/s recently.

gkasprow commented 1 year ago

We have a use case for this chip in the ion trap community. Just a better version of the Phaser with much lower phase noise. The plan is to buy a devkit, plug it into CERN DIOT 3U Kintex carrier and give it a try.

gkasprow commented 1 year ago

I think AD9164 would be better. It offers far better phase noise. Correct me if I'm wrong, but the only difference I found between AD9164 and AD9166 is an embedded wideband amplifier with single-ended output. AD9166 is advertised as a vector signal generator, but the AD916xx family has exactly the same digital data paths, including NCO and IQ upconverter.

gkasprow commented 1 year ago

I received a devkit, and my student will compare the phase noise and other parameters of the AD chip and the RFSOC.