PLL/GBIN choice - Githubissues

sinara-hw / Banker

EEM with 128 TTL DIOs (64 via IDC, 64x via VHDCI)

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Open jordens opened 5 years ago

jordens commented 5 years ago

The IOBs block the PLLs unless the PLLs use that IOB or the IOB is unused or the IOB is output-only.

Make GBIN0 and GBIN5 and their respective other PIO side pins output only (LEDs, CFG_RELOAD, testpoints etc)
Leave clk25 input on a non-PLL GBIN

Same might apply to Humpback.