PCB review

[gkasprow]

Digital board

• [x] doesn't this particular STM MCU require crystal for USB operation?
• [x] Use L1, D1 the same as in other Sinara project (Stabilizer, Thermostat)
• [x] please add 10k pullup to NRST. I'm not sure C4 is good idea, it may interfere with debugger. If such one is on the devkit than it's fine.
• [x] Is C31 sufficient for this LDO?
• [x] use 1mm/0.15mm silkscreen, enable only active components. there is usually no place for all RCs
• [x] missing board shape on Mechanical1
• [x] #11
• [x] #15
• [x] add board name, version and date
• [x] when using ports, use hierarchical designs. It's easier to navigate through it.
• [x] in Sinara ecosystem we use IC? designators for chips
• [x] #12
• [x] name the board: DiPho_digital.PcbDoc
• [x] verify how the board will be fixed in the ALU enclosure, it may need some cutouts / key or copper clearance areas
• [x] expose some free IOs as testpoints. 1mm pads would be fine, try to expose UART

Analog board

• [x] use 1mm/0.15mm silkscreen, enable only active components. there is usually no place for all RCs
• [x] missing board shape on Mechanical1
• [x] add board name, version and date
• [x] unify stackup with digital board, we will produce all boards as one.
• [x] use ground plane
• [x] add current limiting resistor between 5V supplied opamp and MCU. Beware of latchups. 470Ohm and 10nF should do the job. CPU ADC requires low impedance driver, that's why we need a capacitor. U5, U6 are affected
• [x] add some RC filter between MCU DAC and opamp buffer
• [x] #14
• [x] in Sinara ecosystem we use IC? designators for chips
• [x] use lowpass filter for AFE P5V0 rail. For the moment it's the same as USB rail. Maybe it makes sense to use LDO and let's say 4.7V rail voltage? ADL5304 works from 4.5V
• [x] name the board: DiPho_AFE.PcbDoc
• [x] verify how the board will be fixed in the ALU enclosure, it may need some cutouts / key or copper clearance areas

Adapter

• [x] move USB to the board edge
• [x] adapt PCB shape to some existing and available enclosure, preferably one with panels. Such panels can be easily cut with laser ploter.
• [x] add a PCB placeholder for EMI filter (fig 19 in datasheet)
• [x] use RA LED close to panel, preferably same as in other designs
• [x] why two LEDs are used?
• [x] add another supply connector, preferably USB so it would be possible to use Ethernet without PoE
• [x] add 5V 600W TVS
• [x] instead of D1 use the same diodes as in Thermostat.
• [x] use 1mm/0.15mm silkscreen, enable only active components. there is usually no place for all RCs
• [x] missing board shape on Mechanical1
• [x] add board name, version and date
• [x] unify stackup with digital board, we will produce all boards as one.
• [x] in Sinara ecosystem we use IC? designators for chips
• [x] PCB file is not added to the PrjPCB
• [x] name the board: DiPho_PoE_adapter.PcbDoc
• [x] verify how the board will be fixed in the enclosure, it may need some holes / cutouts / key or copper clearance areas

Common

• [x] make separate common, multi-board project so all boards could be produced and assembled as one PCB, greatly reducing tooling cost. It's tricky so ask first.
• [x] one can use 0.2/0.5mm vias and 5mils/5mils traces/clearance
• [x] use TSK stackup

[gkasprow]

@pm-daniel I finished the review.

[gkasprow]

• [x] avoid via in the pad, add Altium rule.
• [x] some components are too close. Try to use Mechanical 15 rectangles as a clearance marker
• [x] tent vias, but only ones that are not exposed on the thermal pads.

[pm-daniel]

@gkasprow I fixed all mentioned things in the adapter project 077a311

[pm-daniel]

@gkasprow fixed a few things in the digital board schematic, have a look a5d5d1f

[gkasprow]

@pm-daniel go on with the PCB design

[pm-daniel]

@gkasprow I've finished AFE PCB f7f5641

[gkasprow]

ok, looks good, but there are still a few issues

• [x] Avoid such traces. They confuse the AOI

Use these instead

• [x] Add and use acute angle rule
• [x] there are still many DRC issues; add thermal pads to be allowed for vias
• [x] digital PCB has many missing connections.

[gkasprow]

and please mark all the issues above when fixed

[pm-daniel]

@gkasprow both boards are finished 3fac3f8 26e2a46

[gkasprow]

oh, I looked at the wrong releases.

[pm-daniel]

not really, I've pushed them today ;)

[pm-daniel]

@gkasprow Is there anything else to be fixed?

[gkasprow]

It looks fine. we can produce prototypes.

[pm-daniel]

Should I prepare production files?

[gkasprow]

Yes, send them to Technoservice (TSK), and send me an invoice.

[airwoodix]

@gkasprow @pm-daniel thanks a lot for the great work on this project! Is there already a timeline available for prototypes and firmware development?

[pm-daniel]

@airwoodix the prototype was sent into production last week

[airwoodix]

Awesome, thanks for the quick update! Could you please also upload the schematics' PDF as release? or is it too early for that?

[gkasprow]

@pm-daniel please make a release as in other projects.

[pm-daniel]

@airwoodix is there any way in which I can contact you? I would be grateful for some information about use cases for DiPho, it would help write my thesis introduction.

[airwoodix]

Sure. I believe that my email is available from some (recent) commits in m-labs/artiq.

I don't have a specific application in mind at this stage. The motivation for #1 was to see if one can get small footprint general purpose photodiodes to drop in a laser system and record for a more or less extended period of time ("I see some weird periodic signal on my atoms/ions, can I correlate this to laser power?", "I need to couple a fiber that extends to the neighboring building" (current solutions include a return signal cable or a webcam / your-favorite-messenger video call), "I'd like an automatic alert when this laser diode dies, this fiber/cavity coupling gets bad, etc."). One can surely do fancier things depending on the actual bandwidth and dynamic range. The analog output could be used for feedback, as mentioned by @dhslichter for example.

IIRC there's a bit more in #1. Overall, I find @jordens' vision really attractive and DiPho looks like a nice step in this direction.

[airwoodix]

@pm-daniel do you have an update on the PDF release? Thanks!

[pm-daniel]

@airwoodix It will be ready by Monday - I had a really busy week.

[pm-daniel]

@airwoodix pdfs are ready, there should be pre-release tag visible in repository

[airwoodix]

@pm-daniel Wonderful, thanks a lot!