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sinara-hw / EEM_FMC_Carrier

HPC FMC carrier in EEM format
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DDR3 CK is not connected to CC pins #19

Closed filipswit closed 2 years ago

filipswit commented 2 years ago

UG586 p.102: CK must be connected to a clock capable (CCIO) p-n pair in one of the control byte groups

marmeladapk commented 2 years ago

Which version of this guide are you using? In v4.2 it states: "CK must be connected to a p-n pair in one of the control byte groups. Any p-n pair in the group is acceptable, including SRCC, MRCC, and DQS pins." It's only an output from an FPGA, so it's weird. Plus current placement passes MIG check in Vivado.

filipswit commented 2 years ago

You are right! Unfortunately v1.3 is the first in google search.