larger FPGA

[sbourdeauducq]

The 200T appears to be pin-compatible, and for Shuttler would allow sigma-delta modulation to increase effective bit depth, additional DDS tones, and perhaps a better RTIO interface with one dedicated channel per coefficient.

Currently we are approaching the limit of the 100T.

[dhslichter]

I would support this -- it certainly makes for a more general-purpose board, and would be good for Shuttler specifically as well. @gkasprow what's the price difference between 100T and 200T with your pricing breaks?

[marmeladapk]

We can also consider supporting DIOT FMC Carrier. EFC was in fact based on diot carrier in many ways.

wt., 12 wrz 2023, 23:37 użytkownik Daniel Slichter @.***> napisał:

I would support this -- it certainly makes for a more general-purpose board, and would be good for Shuttler specifically as well. @gkasprow https://github.com/gkasprow what's the price difference between 100T and 200T with your pricing breaks?

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[sbourdeauducq]

DIOT FMC Carrier

Looks totally overkill and not compatible with EEM. TBH I'm a little surprised by the resource usage and there may be some low-hanging fruits (@occheung ?), just floating the idea of switching to 200T at the moment.

[dhslichter]

We can also consider supporting DIOT FMC Carrier.

This is a comment for a different issue, and I agree with @sbourdeauducq that these are two different boards and we shouldn't try to merge them.

The question here is simply if we can make a run of EFC boards with the 200T populated instead of the 100T. I would be strongly in favor of this and we would prefer to buy boards with 200T than 100T.

[gkasprow]

I think we can providing that vccint power supply is sufficient. About pricing it's a question to @pkozakiewicz

[pkozakiewicz]

@gkasprow Can you please create a release so that I can pass it to the right person?

[gkasprow]

the new relese is still in progress. Just replace XC7A100T-3FGG484E with XC7A200T-3FGG484

[pkozakiewicz]

There is no production documentation even when it comes to the old one.

[marmeladapk]

That's my bad. I'll make a release shortly.

[pkozakiewicz]

Just replace XC7A100T-3FGG484E with XC7A200T-3FGG484

@gkasprow There's no such chip, did you mean 3FBG?

[sbourdeauducq]

FWIW we have managed to fit all features (except better RTIO interface) and 16-bit sigma-delta in the current 100T FPGA.

[maciejprzybysz]

We are in the process of adding 200T option in new revision. Here are some notes on that (for future reference):

• 100T and 200T are footprint, and pinout compatible. Source: DS180 p.3, UG475 p.125-127 p.116-118
• 200T requires about twice the power supply current. Source: DS181
• XC7A200T requires almost double capacitor count at Vccint, and one additional at Vccbram. Source: 7 Series FPGAs PCB Design Guide UG483 p.16 ADP5052 regulator meets that requrement.
• Some timing parameters varies between 100T and 200T. Worth to consider if this is important. Clock tree skew and clock delay in DS181.

Adding more capacitors should be possible, but it will take additional time.

[dhslichter]

seems worth it to me, overall. Can @sbourdeauducq or @jordens comment on the extent to which the slightly higher worst-case clock tree skew might impact existing (or currently envisioned) gateware designs? 0.27 ns (100T) vs 0.4 ns (200T) in speed grade -3.

[jordens]

I don't think it matters but to give a reliable answer it would obviously need to be tested.

Crucially though it doesn't seem worthwhile to persue given what's been said. I can fit more than 128 well designed NCO cores and copious amounts of DS modulators and interpolators on a single 100T already.