Closed maciejprzybysz closed 7 months ago
Hello, would it be possible to add P4 (and maybe P3 for v2, low priority) to keep it compatible with the DI/OT crate RTM connections? We're interested in using this board at CERN SY-ABT as a cheaper alternative for https://ohwr.org/project/diot-pfc-ku/wikis/home
@pvantrap This would require changing the FPGA. There's not enough pins on the current one.
Right I was already afraid of that. How many free pins do you have left? I'm asking because maybe part of (an optional) P4 could be wired.
And just for my information, what is the FMC used most commonly with this carrier?
We use it currently with Shuttler and Waver FMCs. We have plans to use it with FMC TDC ADC for CERN AEGIS project
AFAIR guys from Oxford use it with FMC CoaxPress cards to capture images from sCMOS cameras.
Right I was already afraid of that. How many free pins do you have left? I'm asking because maybe part of (an optional) P4 could be wired.
We have 6 free pins.
We may also expose I2C or some signals from I2C extender...
The new revision v1.1 (rc1) of EEM_FMC_Carrier has been published. The project is ready for community review - if you are interested in this project feel free for posting any remarks/comments.
ChangeLOG
EFC v1.1 was released, so I close issue.
We are going to make new revision of EFC. Issues to fix:
TBC:
Estimated completion: 10/2023
Feel free to add any suggestions/issues/ideas for new revision.