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sinara-hw / FMC_Shuttler

16-channel 125MS/s 16bit DAC in FMC form factor.
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ADCLK845: OUT3 requires CMOS Logic but LVDS Logic is set #39

Closed linuswck closed 1 year ago

linuswck commented 1 year ago

Ctrl_A is set to GND. Thus, according to datasheet, OUT0, OUT1, OUT2, OUT3 is configured to be LVDS logic. However, DAC_CLK7 on OUT3 requires a CMOS output. Then, the DAC on channel 7 will be malfunction.

Screenshot from 2023-08-29 10-39-51

Screenshot from 2023-08-29 10-40-49

linuswck commented 1 year ago

I was looking at release review version of schematic. This is fixed in later revision on master.