v1.3 Fastino-DIOT changelog

[gkasprow]

• added DIOT support
• added external references (SMA via MMCX pigtail, DIOT backplane)
• added high precision variant (Y1747V0207BA9W resistive networks)
• connectors unified with mini-SAS as in Shuttler https://github.com/sinara-hw/meta/issues/89

• 84

• 91

• 90

• BSH103 replaced by BS138 to simplify BOM

• 93

• 92

• 96

• DNP parallel termination as default option
• Added power/I2C connector to HVAMP32
• 1N4148 (D4) replaced with BAT165 to simplify BOM
• added No ERC labels to suppress hundreds of warnings
• SPI control was added to AFE; some LED lines are now used as AFE ID inputs but can be overwritten by FPGA and control LEDs.

[kaolpr]

Can we consider implementing https://github.com/sinara-hw/meta/issues/89 in v1.3?

[hartytp]

We did quite a bit of testing and layout optimization to minimize digital-analog cross-talk. Is there a plan for making sure that none of these changes introduce performance regressions?

[gkasprow]

@hartytp I did my best not to touch the analogue part and preserve cutouts and all crosstalk-related optimisations. We test this board using SSA and ions.