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sinara-hw
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Fastino
Fast 32-channel, 3MS/s per channel, 16bit DAC EEM card compatible with Zotino
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v1.0rc2 schematic review
#24
hartytp
closed
4 years ago
31
BSH103 has 8 V_GS max
#23
jordens
closed
4 years ago
5
SPI routing/termination/leakage
#22
jordens
closed
4 years ago
24
test points
#21
jordens
closed
4 years ago
0
DAC - FPGA pinout
#20
jordens
closed
4 years ago
1
FPGA clocking
#19
jordens
closed
4 years ago
14
I2C issues
#18
jordens
closed
4 years ago
0
P1V8 led and testpoint should be P1V2
#17
jordens
closed
4 years ago
1
FPGA LVDS/EEM
#16
jordens
closed
4 years ago
2
Link design
#15
jordens
closed
4 years ago
7
SMPS/LDO power budget
#14
hartytp
closed
4 years ago
18
thermal and PI sims
#13
hartytp
closed
3 years ago
5
repo permissions
#12
hartytp
closed
4 years ago
0
higher voltage operation
#11
hartytp
closed
4 years ago
0
reference distribution
#10
hartytp
closed
4 years ago
31
schematic review
#9
hartytp
closed
4 years ago
17
FPGA selection
#8
gkasprow
closed
4 years ago
10
> 2.0 MSPS
#7
jbqubit
closed
4 years ago
9
Vref to 5V
#6
hartytp
closed
4 years ago
1
adiabatic use case, f_DAC_clock > f_secular
#5
jbqubit
closed
4 years ago
6
filter design
#4
hartytp
closed
4 years ago
54
different ouput op amp
#3
hartytp
closed
4 years ago
5
analog design notes
#2
hartytp
closed
4 years ago
43
[RFC] new EEM: Fastino (faster version of Zotino)
#1
dtcallcock
closed
4 years ago
70
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