sinara-hw / Kasli-SOC

Xilinx ZynQ(R) version of Kasli FPGA controller.
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EEM8 and EEM9 collide with rails #75

Open jordens opened 1 year ago

jordens commented 1 year ago

EEM8/9 have a small clearance of ~1.5 mm to the board edge. In common board storage systems or crates with 3 mm rail depth this isn't enough and leads to seizing/scratching/damage. If possible move them 0.5 mm, better 1 mm, down. Same for the fan connector if not already done.

kaolpr commented 1 year ago

Has this issue been previously reported? If not, its severity may be questionable since it has gone unreported for over three years.

Currently, implementing this modification would impede the adoption process of DIOT, as a number of adapters have already been manufactured specifically for this EEM layout.

We can leave this open and if any other layout-altering issues emerge, we can address them in a future release that may require a new version of EEM adapters.

jordens commented 1 year ago

As stated, it's not an issue in many crates as the rails aren't that deep and there is usually no other rail so close. But in PCB storage systems there is always a rail/board guide adjacent. I don't see how this really hinders DIOT adoption. People will know whether they need the adapter when they order Kasli. Hence there is little desynchronization. Just make a revision in both designs and match the releases/production. As mentioned previously, also for exactly these reasons I'd rather deprecate this adapter and make a proper Kasli-DIOT. The adapter road especially on Kasli is IMO the biggest blocker in DIOT adoption in Sinara.