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sinara-hw / Kasli

Kasli is a powerful FPGA carrier, capable of controlling 12 Eurocard extension modules.
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Kasli sudden death during tests #21

Closed gkasprow closed 5 years ago

gkasprow commented 5 years ago

It happed already 3 times that Kasli FPGA died. In all cases the 2V5 rail was shorted to GND. Only FPGA replacement helped. Futher investigation shown the problem - it was short circuit between LVDS line and 3V3 supply on EEM board. Last time it happened on Urukul. 3.3V souced by Urukul from buck converter enters FPGA bank supplied from 2.5V. 0.7V is enough to trigger latchup. FPGA can typically handle 20mA of input current. Higher current triggers parasitic thyristor which then shorts 2.5V rail to GND. And it it is enough to kill the FPGA because current sourced by Kasli SMPS is high enough. I want to build simple EEM feed-through that would sense LVDS line voltages using fast Schottky diodes and short the excessive voltage to let's say 1.5V. LVDS is centered around 1.25V so won't harm the signals. So Schottky connected to 1.5V would limit the LVDS line voltage to max 2V at 2A. To not kill the diodes thermally, such event will cut 12V rail immediately. So I will design such module that supports 2 EEM connectors and has 3.3 and 12V MOSFET switch.

hartytp commented 5 years ago

Nice catch Greg! Is the plan to add this to Kasli for the next revision?

gkasprow commented 5 years ago

It won't be part of Kasli, but another module used only during tests. It would harm signal integrity of LVDS signals and make serious impact on Kasli price.

jordens commented 5 years ago

I'd also like to avoid putting 200 diodes on Kasli. Nice testing and deployment tool though. How would Banker/Humpback react to 3.3V being fed on the LVDS lines? Do the resistors limit the current to not trigger?

hartytp commented 5 years ago

It won't be part of Kasli, but another module used only during tests. It would harm signal integrity of LVDS signals and make serious impact on Kasli price.

I'd also like to avoid putting 200 diodes on Kasli. Nice testing and deployment tool though.

Fair enough. Sounds like a good plan.

gkasprow commented 5 years ago

@jordens The same applies to ICE40 FPGA and we need such tool to protect it against damage during tests with faulty EEMs.

gkasprow commented 5 years ago

@marmeladapk please have a look at the protection circuit I designed. EEM_Protector.PDF

jordens commented 5 years ago

How did the shorts between 3.3V and the lvds lines happen on Urukul? Bad solder on the LVDS converter?

marmeladapk commented 5 years ago

It seems that there was a short on PCB between lines.

gkasprow commented 5 years ago

The PCB house did'd do the electrical test properly.

hartytp commented 5 years ago

@gkasprow closing this issue, as the EEM protector is a separate design and not part of Kasli, so I don't think there is anything to change on the Kasli repo here.