Closed sbourdeauducq closed 5 years ago
We may have seen something similar when the FPGA wasn't soldered correctly.
Why did that affect the SDRAM in particular? Which solders were broken?
Part of the FPGA was lifted and some FPGA pins (particularly lower left quadrant) didn't make proper contact. It was easy to see visually, FPGA wasn't aligned horizontally with the board. We didn't check pin by pin as it was obvious that the FPGA had to be resoldered.
That failing Kasli also developed breakage on EEMs 9 and 10.
I have one where SFP0 is not receiving and where this SDRAM zero window happens sporadically. It's also a speed grade 3.
@gkasprow what do we do about this?
This happened on a PCB series where FPGA was soldered later on manually. There is nothing to do with PCB design. The tests were probably not sufficient or were not conducted at all.
This happened after shipping on a Kasli (mounted in a subrack) that was working before, without touching the firmware:
Has anyone seen this issue before?