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sinara-hw / Phaser

Quad channel 1GS/s RF generator card with dual IQ upconverter and dual 5MS/s ADC and FPGA in EEM form factor
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ADC input protection #151

Closed nkrackow closed 2 years ago

nkrackow commented 2 years ago

The LTC2323 ADCs can take a maximum Voltage on the differential inputs of Vdd, which is 5V on Phaser. The single ended to differential opamps can swing between their +-11V rails.

If the input to Phaser is out of range for the current programmable gain amplifier (PGA) setting, the ADC input Voltage will be out of spec. This can happen easily since one PGA step is a factor of 10.

Even though I didn't manage to break the ADC with out of spec voltages yet, it would be good to put some clamping diodes and maybe a bigger resistor on the ADC input.

hartytp commented 2 years ago

I don't follow you here. From a quick skim over the schematic, the single-ended -> differential OpAmps have a gain of 1/5 which means that even if the InAmp rails it can never drive the ADC outside of its safe operating range.

nkrackow commented 2 years ago

Ah, good point, I forgot to take the gain into account. 2V + 1/5 * 11V is well within range of Vdd. Sorry.

hartytp commented 2 years ago

phew! You had me worried we'd messed up copy-pasting this from Sampler. FWIW IIRC these ADCs require a very low driving impedance (they need to quickly charge up capacitors) so sticking a big resistor on the input really degrades their performance.