Power budget - Githubissues

sinara-hw / RFSOC-AMC

AMC module with Xilinx RF-SoC and two analog front-end mezzanines for SDR and quantum applications

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Closed filipswit closed 3 years ago

filipswit commented 3 years ago

Use LTpowerCAD to make power budget. With nice drawing will be easier to verify if there aren't any more mistakes.

tprzywoz commented 3 years ago

I added to repo rfsoc.ltp3 file. I couldn't find information about RFMC power limits for Xilinx Eval but based on ZCU111:

2.5V (DAC_VTT) was designed for max 500mA (including SoC and RFMC)
1.8V (VCC1V8) was designed for max 2A. We have only additional Artix-7 and 4A current limit - should be enough.
3.3V it's really hard to estimate ZCU power limit for this rail. In current RFSoC_AMC design, current limit is 2,7A (all IC worst case). It can be increased to 6,7A by merging P1V13 and MGT1V2.

filipswit commented 3 years ago

Good job!

AMC module (+eventual RTM) shouldn't draw more than 80W, now it's almost 100W. Same with 3V3_MP, it should not exceed 150 mA

But I don't think you can do anything with it.