hartytp
commented
6 years ago Firstly, to remind myself what we expect here.
- Input noise of the AD8253 at G=1k is 10nV/rtHz + 5pA/rtHz
- With 50R termination, that goes to ground through a pair of 1.8k resistors
- Assuming I've understood the noise model, we have: n = sqrt(10^2 + 5e-3*1.8e3 + 7.6^2)=13nV/rtHz
- 3dB BW=60kHz so (assuming dominant pole) noise BW is 96kHz
- Integrated noise is expected to be 4.0uVrms
So, the measured numbers fall roughly +-10% of the calculation. That's about as good an agreement with the theory as I'd expect, so I'm not overly worried about it -- particularly given that we only have 1 data point for each version. My suspicion is that this is just device to device variation, so it would be interesting to see some more statistics (e.g. more channels/more boards).
Note also that I'm not aware of any changes to the design that could cause this (the high-gain noise is dominated by the AFE which is unchanged between designs IIRC).
Is 4.4 µV RMS, was 3.7 with Novogorny (14.3 vs 9.7 LSB RMS). The bandwidth limitation should be the same (the INA). Different full scale voltage (12/10) taken into account. Maybe investigate this.