Open sbourdeauducq opened 4 years ago
Actually, the CMOS oscillators are not stocked and we will use LVDS ones. At least in Metlino. You can use either 2x SSTL18 or LVDS. The latter consumes less current.
Ok, and should there be DIFF_TERM=TRUE or not? And I was asking about Sayma v2 (the boards that have already been produced) and Kasli v2.
How was this resolved?
Should the FPGAs enable integrated LVDS terminations (DIFF_TERM=TRUE) for those signals that it receives from the DCXOs?
I suppose that we should use the LVDS standard even when the DCXO is CMOS, so that LVDS DCXOs can be used instead without changing the bitstream.
(Same question for AMC, RTM and Kasli v2)