Closed marmeladapk closed 5 years ago
@gkasprow Could we connect telecom clock A through capacitors (DNPed) to ADCLK948 CLK0? This would allow us to use Saymas with WR-MCH without any serious reworks on the board.
Or to FPGA directly
I routed DNP option for TCLKA to CLK1 of mux, instead of SI5324, TCLKB instead of WR-CLK to the input of FPGA directly.
@gkasprow Could we connect telecom clock A through capacitors (DNPed) to ADCLK948 CLK0? This would allow us to use Saymas with WR-MCH without any serious reworks on the board.