@gkasprow TL;DR Overall it seems, that RTM connector sheet on AMC schematics was not changed to reflect new connections on RTM.
Some examples, assuming that pin A1 on AMC connects to A1 on RTM (I gave up after first sub-part):
[ ] Are you sure, that RTM_FPGA_GTP_Rx/Tx0 on GTH schematics is connected to RTM_FPGA_LINK bus?
[ ] RTM_FPGA_GTP_Tx1 (LVDS4 on RTM) is DC biased
[ ] RTM_FPGA_GTP_Rx1 (LVDS1_CC on RTM) is AC coupled unlike other LVDS connections
[ ] RTM_FPGA_GTP_Rx1 (LVDS1_CC on RTM) is connected to byte-lane clock input, not GC
[ ] ADC1_SYNC, ADC2_SYNC (LVDS2, LVDS3 on RTM) has swapped polarity
[ ] RTM_FPGA_USR_IO (LVDS0_CC on RTM) is not connected to CC pin
[ ] AMC_MASTER_AUX_CLK (LVDS11) is DC biased
Cosmetics:
[x] Rename nets, so that they resemble RTM connections (e.g. RTM_AFE_LVDS or something like that), right now there are nets like RTM_FPGA_GTP_Tx1, which connect to some LVDS lines on AFE
@gkasprow TL;DR Overall it seems, that RTM connector sheet on AMC schematics was not changed to reflect new connections on RTM.
Some examples, assuming that pin A1 on AMC connects to A1 on RTM (I gave up after first sub-part):
Cosmetics: