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sinara-hw / Sayma_RTM

RTM board with 8-channel GS/s DAC, 125MS/s ADC and flexible clock circuit
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Layout improvement: components placement #98

Closed filipswit closed 5 years ago

filipswit commented 5 years ago

Just thinking if this kind of layout wouldn't be better for signal (as an example output from buffer IC58): image

instead of this: image

gkasprow commented 5 years ago

I placed single ended 50R lines to solve the issue.