Closed hartytp closed 5 years ago
we care only about the separation between PoE HV inputs and the rest of the circuits. The clearance between HV inputs can be much lower. I found that on negative layer there was not enough clearance.
Otherwize, the clearance of at least 1mm is preserved.
I added special HV clearance rule
...and a lot of not obvious violations appeared :)
DRC is a wonderful tool