Closed jordens closed 4 years ago
We should not put top layer traces into the board guide area. That'll work against metallic enclosure edges and wear of the solder mask. It's also no good for cPCIs IIRC.
that's not top layer. The trace is on L2. It may look misleading due to prepreg transparency settings:)
Ah. Ok then!
We should not put top layer traces into the board guide area. That'll work against metallic enclosure edges and wear of the solder mask. It's also no good for cPCIs IIRC.