unreliable startup of alternate DC/DC

[sbourdeauducq]

The startup current at the output of the alternate DC/DC (JHM0612D12) is excessive and can trip its short circuit protection. The DC/DC tries to restart but never manages to and the +/-12V rails remain unpowered.

The issue can be worked around by:

1. cutting the trace that connects SHDN# (pin 5) of IC27 to the input
2. soldering a 100K resistor above the cut
3. soldering a 1µF capacitor between SHDN# (pin 5) and GND (pin 6) of IC27

This delays the startup of the P12V0A rail and avoids overloading the DC/DC on power-up.

In my experiments, bootstrapping either the positive or the negative rail with a lab power supply allows the board to start. I have applied the workaround on the positive rail only because the soldering job was easier there.

I have not checked carefully if this is a good or the best solution. @gkasprow could you go over this?

[sbourdeauducq]

[maciejprzybysz]

We have tested our cards. We were able to reproduce the problem, but its occurrence is not deterministic. Only on few cards the inverter could not powerup. There was no problem with others. What's more, some cards that didn't work the day before were able to start up properly the next day.

The oscillograms of the P12V0 input voltage (yellow) and the positive output of the converter (green) look like this:

This new converter (JHM0612D12) has similar parameters as the previous one, but it is apparently worse at starting under load. There is ~65uF capacitance on each output of converter (max. capacitive load due to datasheet is 250uF). But there are also two LDOs powered from the plus and minus of this converter that must charge one 10uF capacitor per DAC channel. So we have 32x10uF on N12V and 32x10uF on P12V. The negative LDO voltage has a nominal current capacity of 200mA, but the overcurrent protection according to the datasheet allows even 350mA or more temporarily. The positive LDO voltage has a nominal current efficiency of 500mA, and even more considering the current limit protection.

The converter has +/-250mA output current, but the documentation is quite poor when it comes to operation during powerup and current protection limits. After startup maximum Zotino current consumption should not exceed converter specification, but apparently there is problem during startup.

We made a similar fix on one piece, we used a 470nF capacitor and a 220k resistor. This delayed start of the second LDO by few ms (P12V LDO output - yellow, N12V LDO output - green):

Converter outputs after fix look like this: Zoomed:

Output on the signal connector during start up:

It seems that at the moment this is the easiest way to fix, in next revision we can think about changing the LDO, e.g. with I_limit setting or simply implement this fix.

[sbourdeauducq]

Seems this is not sufficient, still seeing some intermittent failures with this workaround.

[sbourdeauducq]

And the cards we have use the LT1964ES5-BYP population option without SHDN# so the same workaround cannot be applied to the other rail.

[sbourdeauducq]

LT1964 datasheet says "A maximum value of 0.01μF can be used" regarding the BYP capacitor and we are already at that value, so we cannot simply increase it to delay startup.

[maciejprzybysz]

Due to the difficulty in reproducing the problem, I added a few capacitors on the P13V0 line. This allowed me to reproduce the problem every time the power was turned on.

At the beginning I turned off the P12V0 LDO to check if the converter can handle additional capacitance. This was not a problem. So I adjusted RC values to increase P12V0 LDO power up delay Now we have time constant above ~1s, but due to low threshold on LT1763 shutdown pin (0.8V typ) it delays power up only ~50ms.

Blue & red is +/-13V converter output, green is N12V0 LDO output, yellow is P12V0 LDO output.

Negative voltage LDO in SOT23-5 case has no shutdown pin, so we could only decrease capacitance on negative rail to improve startup reliability, but I think with increased P12V delay should be much better.

[maciejprzybysz]

Fixed in v1.4.3 - voltage supervisors for P12V0 & N12V0 sequencing added