the channel enable procedure takes >100ms (based on the timings of the sequencing IC). Am I right in thinking that your ticks are 1ms each, so a delay of 100 ticks is 100ms? If so, I'm not convinced that the delays you use in your calibration process are correct.
Also, out of curiosity, after flashing for the first time but before calibration, what is the value of the DAC when the channels are enabled? Does it definitely start at max value (no current)?
the channel enable procedure takes >100ms (based on the timings of the sequencing IC). Am I right in thinking that your ticks are 1ms each, so a delay of 100 ticks is 100ms? If so, I'm not convinced that the delays you use in your calibration process are correct.
Also, out of curiosity, after flashing for the first time but before calibration, what is the value of the DAC when the channels are enabled? Does it definitely start at max value (no current)?