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sinara-hw / mirny

4-channel Microwave synthesiser
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Mirny v1.0 tests #7

Closed gkasprow closed 4 years ago

gkasprow commented 5 years ago

The Mirny is ready for tests 2019-03-26 12 40 37

gkasprow commented 5 years ago
gkasprow commented 5 years ago

CPLD is detected over JTAG

gkasprow commented 5 years ago

@CannaCardo it's time to connect ADI devkit and check if the synthesizers are working

CannaCardo commented 5 years ago

Ack, I should be in Warsaw on Thursday to test it.

jordens commented 5 years ago

Nice!

gkasprow commented 5 years ago

the CPLD cannot really set Hi-Z on CLK_SEL signal. the state is close to VCC. With a touch of the probe, the Hi-Z appears and stays until power down. So it looks like additional init sequence would be needed that first sets low state and then Hi-Z.

gkasprow commented 5 years ago

Other than that Mirny works with ADI devkit as a controller.

gkasprow commented 5 years ago

It looks like the noise source was outside. With analyzer and supply connected to same mains outlet the spectrum looks much better now. 22

jordens commented 5 years ago

It works on urukul. Just tristate it.

jordens commented 5 years ago

What are the conditions and settings there? With div32 and a 3.4 GHz vco the datasheet gets to -131dbc/hz at 10khz and 61 mhz pfd.

gkasprow commented 5 years ago

the SSA I have is not a really good one. It is a software option to the spectrum analyzer. It's good for quick debugging, not real measurements. With CMC added to the 12V power entry, the 26kHz peak disappeared. We will make measurements with real SSA in a few days.

gkasprow commented 5 years ago

Here is the thesis of Krzysztof Belewicz

jordens commented 5 years ago

Well done. Congrats @CannaCardo

jbqubit commented 5 years ago

Thanks for the detailed writeup @CannaCardo! Great work!