Open adamkolodynski opened 4 years ago
@jordens do you think we could need the PEC output? Yes, add a standard test pad. we don't expect the DAC to overheat.
please connect the VREF pins.
not critical
Added test pads and VREF: DAC_8CHv2.pdf How about the offset voltage calibration similar to this Automated Calibration
I think the offset will be dominated by the output stage offset anyway. No real reason to calibrate the DAC only.
I found that AD5362BCPZ run of out stock in most distributors(except Chinese sites which is hard to verify), so I changed it to AD5362BSTZ which is also hard to buy but still available.
Use two footprints and assembly options as we do in Zotino
In Zotino DAC packages have the same pin number and pin description and here one has 52 pins and the second has 56 pins. Their description and placements are not fitting in many cases. I don't think it is possible here.
U can try to place them side-by-side. We don't have high-speed signals here.
Zapper DAC voltage range
I think the best output range would be 0 to+10 V, DAC has also configurable offset registers, but I don't know how convenient are their usage. The voltage range is defined by 4xVref, but we have to be in +-1.4 V from the power supply. I see two options:
DAC additional functions
Translating signal from EEM and DAC design are very similar to Zotino, but AD5362 has more additional functions that AD5372, so I need to know which can be useful.
Current schematic files
LVDS schematic DAC_8CH.pdf