RiscyD2 is a RISC-V based softcore, implemented on the Xilinx Artix-7 FPGA (board: Digilent Arty A7-35T)
Arch: RV32IM
To easily test, load the bitstream included in release v0.0.2 to the board.
Changes since first commit:
I recalculated inference time after fixing csr cycle counting on the chip.
Porting of TinyMaix to RiscyD2 (softcore)
RiscyD2 is a RISC-V based softcore, implemented on the Xilinx Artix-7 FPGA (board: Digilent Arty A7-35T) Arch: RV32IM To easily test, load the bitstream included in release v0.0.2 to the board.
Changes since first commit: I recalculated inference time after fixing
csr
cycle counting on the chip.