LicheeRV Nano Pinout Diagram/Schematic Mismatch - Githubissues

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LicheeRV Nano Pinout Diagram/Schematic Mismatch #650

Open fzi-haxel opened 7 months ago

fzi-haxel commented 7 months ago

The LicheeRV Nano 70405 Pin Definition (the pinout diagram of the board) specifies the following functions for pins A18 and A19

A19: GPIOA_19 UART1_RX JTAG_TCK PWM_7
A18: GPIOA_18 UART1_TX JTAG_TMS PWM_6

But the schematic shows the following pins

GPIOA_19: CR_4WTMS/CAM_MCLK0/PWM[7]/XGPIOA[19]/UART1_RTS/AUX0/UART1_TX/VO_D[28]/JTAG_CPU_TMS
GPIOA_18: CR_4WTCK/CAM_MCLK1/PWM[6]/XGPIOA[18]/UART1_CTS/AUX1/UART1_RX/VO_D[29]/JTAG_CPU_TCK

which has the UART and JTAG pins swapped.

From my limited testing, I think this should be the correct version:

A19: GPIOA_19 _UART1TX _JTAGTMS PWM_7
A18: GPIOA_18 _UART1RX _JTAGTCK PWM_6

Fishwaldo commented 7 months ago

JTAG is broken on the board due to the pull up resisters on 18/19/28/29 so probably best to just remove any reference to JTAG regardless. :(

https://github.com/sipeed/LicheeRV-Nano-Build/issues/13