Misagligned load exception when running SHA-256 benchmark without I-cache

skordal / potato

A simple RISC-V processor for use in FPGA designs.

BSD 3-Clause "New" or "Revised" License

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Misagligned load exception when running SHA-256 benchmark without I-cache #1

Closed skordal closed 8 years ago

skordal commented 8 years ago

When running without the instruction cache enabled (ICACHE_ENABLE set to false in pp_potato), the SHA-256 benchmark application crashes after a short while with the error:

Unhandled exception!
Cause: 0x00000004
EPC: 0x00000584

This indicates an attempt to load from a misaligned address.