Created AD5541 DAC VHDL module and updated Python class to match.
Details
Created a new AxiAd5541Core VHDL module that is mostly a wrapper around a AxiSpiMaster with some generics set correctly to work with this device.
There is already a Ad5541 Python class defined in surf, which was created in 2019, but the corresponding VHLD module seems to have been forgotten. This existing Python class has different RemoteVariable related to various debug features and I/O control of the missing HDL module. Since this module already exists in surf there might be some conflict in replacing it with this new simplified version. Would it be better to try and find the missing HDL module?
Description
Created AD5541 DAC VHDL module and updated Python class to match.
Details
Created a new
AxiAd5541CoreVHDL module that is mostly a wrapper around aAxiSpiMasterwith some generics set correctly to work with this device.There is already a
Ad5541Python class defined in surf, which was created in 2019, but the corresponding VHLD module seems to have been forgotten. This existing Python class has differentRemoteVariablerelated to various debug features and I/O control of the missing HDL module. Since this module already exists in surf there might be some conflict in replacing it with this new simplified version. Would it be better to try and find the missing HDL module?JIRA
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