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sld-columbia / esp

Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
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Support for additional boards #126

Open sanaallsanaall opened 2 years ago

sanaallsanaall commented 2 years ago

I'm new to ESP and heterogeneous SoC design as well. I'm very interested in using ESP for our research project. But we don't have any supported boards now.

We would like to use ESP for the Ultra96 board or the Zybo Z7-20 board. I think that these two boards are very popular as well as currently supported boards, so we are very interested in adding support.

At present, the Xilinx ZCU102 board is supported, so I'm wondering that I could add support for Ultra96 relatively easily. However, I don't even know where to start working. Could you please give me some advice or a guide?

Thank you in advance.

davide-giri commented 2 years ago

Hi, thank you for your contacting us. Adding support for more FPGA boards is definitely interesting to us. It can be a difficult job, it really depends on how similar a board is to those that are already supported.

The Xilinx ZCU102 support is still a work-in-progress. It's almost ready, but we haven't been able to finalize it and release it yet. We plan to do that in the next few months.

To start with, I'm going to refer you to issue #68 to get an idea of what adding support for a new FPGA board entails. In particular, see this first reply: https://github.com/sld-columbia/esp/issues/68#issuecomment-718948513. From that you can get an idea of how feasible adding support for ESP may be. In short, ESP generates full SoCs and so the FPGA (the PL) requires direct access to peripherals like UART, Ethernet and DRAM. When that's not available, there may be some engineering needed to use those peripherals through the hard CPUs (the PS). In fact, ESP fits more naturally on those boards that have an FPGA, but no CPUs (e.g. no ARM cores).

In addition, depending on the board there may be slightly different DRAM and Ethernet chip. ESP already supports a few different options, but it may be needed to add a new option for the memory controller and for the ethernet controller instantiations. See for example the instantiations for the Xilinx VC707 board: memory, ethernet. You can find the xci files for those IPs and the constraint files in constraints/xilinx-vc707-xc7vx485t.

Please take a look and let us know if you have any questions.

Thank you!