Improve flexibility of ASIC clocking strategy

sld-columbia / esp

Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy

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Closed jzuckerman closed 1 year ago

jzuckerman commented 1 year ago

-enable 1 global DCO -enable only using external clock -modify reset hierarchy to accomodate all strategies

Co-authored-by: Davide Giri davide_giri@cs.columbia.edu