Reading Clock cycles

[Capoz1898]

Good morning, I am trying to compute the execution time of a custom accelerator. I am using an Ariane CPU, so in order to do that I tried to implement the read cycles function from the assembly instruction of RISC-V. I used this instructions properly inserted in a C function that is called before asserting the start bit of the accelerator in the Baremetal code: -asm volatile ("csrrs %0, 0xc00, x0" : "=r" (dst) ); -asm volatile ("csrr %0, cycle" : "=r" (dst) ); -asm volatile ("rdcycle %0" : "=r" (dst) );

But in this way the SoC during the RTL simulation does not reach the validation and done steps.

Someone has an idea on how to do this operation?

[jzuckerman]

Here is a function you can use to read the cycle counter CSR of Ariane. Call it before and after the execution of the accelerator and take the difference of the returned values.

static inline uint64_t get_counter()
{
    uint64_t counter;
    asm volatile (
    "li t0, 0;"
    "csrr t0, mcycle;"
    "mv %0, t0"
    : "=r" ( counter )
    :
    : "t0"
        );
    return counter;
}