How to change the clock frequency of a SoC prototyped on a xc7v2000t profpga

[LucaUrbinati44]

I have a profpga-xc7v2000t and I would like to change the clock frequency of the SoC generated with ESP that is currently set to 50MHz. I don't know which knobs I should use to achieve this task.

I found several ways:

• varying the multiplier, divider and frequency of clkgen in top.vhd#L536: which are the maximum and minimum values I can use?
• varying the input clock frequency provided to the FPGA top entity top.vhd#L51-56, that also means varying the frequencies of the clock generators in the profpga configuration file profpga.cfg#L45-67: which are the maximum and minimum values I can use?
• Moreover, I'm concerned about the maximum frequency allowed by other components of my ESP SoC, such as the Ariane core, the Memory Interface Generator (MIG), and so on.

Could you tell me which which is the best way / the procedure I should follow to change the clock frequency of the SoC, and which is the minimum/maximum clock frequency allowed according to my SoC components, please?

Thank you, Luca Urbinati, Politecnico di Torino