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sld-columbia / esp

Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
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Automatic detection of enabled coherence models for accelerators #82

Open paulmnt opened 3 years ago

paulmnt commented 3 years ago

Device drivers, including bare metal applications, should be able to probe the hardware and detect whether the ESP cache hierarchy is present and whether the accelerator has the private L2 cache in the tile.

After probe, this information should be stored in the device data structure and used to prevent invocations with coherence models not enabled in the current hardware configuration.

jzuckerman commented 2 years ago

New updates to socgen give libesp information about which accelerators have L2 caches. Good solution for now, but a probe solution would be better.