07/10/24

[badeaa3]

Goals:

• [x] 1. plug in the chip

[badeaa3]

Goal 1

• we plugged in the chip
• seeing data on scope
• expecting to see 00030001 from scanOut
• we are seeing 5 (111), 3 (11), 1 (1), 0 (0) which seems to be a cable fault issue. Need to ask Lou for shorter cables

[badeaa3]

To do:

• Ask for DUT connector to level shifter be a female connector so that we can directly plug the level shifter and DUT together without an intermediate connector

[badeaa3]

There is significant data integrity issues for the signals coming to and from the level shifter. All connections need to be checked, cables shorted, and cables insulated from noise (likely by wrapping in copper).

[badeaa3]

We checked the output of the level shifter by changing the voltage from 0.9 to 1 V. The output shape from the level shifter improves significantly when the power supply gives 1.0 V.

At 0.9 V:

At 1.0 V:

[badeaa3]

We ran routine 7 scanChain with loop back mode at 0. We saved all of the 24 words of 32 bits (768 bits total). Then converted that sequence to 768 bits in order. We expect to see 1, 11, 1, 11, 1, 11 .. with the same number of zeros separating. We actually see the following.

>>> "".join([format(i & 0xFFFFFFFF, '032b') for i in x])
'000000000000000000000000000000000000100000000000000010000000000000001100000000000000010000000000011000000000000000010000000000000011000000000000000100000000000001100000000000000010000000000000000110000000000000010000000000000001100000000000000010000000000000110000000000000000100000000000001000000000000000000000000000000010000000000000000100000000000000110000000000000010000000000000011000000000000000100000000000000110000000000000001000000000000011100000000000000010000000000000000011000000000000010000000000000000011000000000000000100000000000001100000000000000010000000000001100000000000000001000000000000011000000000000000100000000000000110000000000000000100000000000001100000000000000001000000000000011000000000000000100000000000000110000000000000000100000000000'

[badeaa3]

Why is scanLoad high right after scanIn goes low?

green = scanIn, yellow=scanLoad, spacely routine ~r7

green = scanIn, yellow=scanOut, spacely routine ~r7. By hand force vth = 0.9 V, which forces the output of each pixel to be 0. Since scanLoad is always high this picks up all zeros. Therefore, scanOut (yellow) should be all zero. This is what we see.

[badeaa3]

Questions:

• does Cristian expect scanLoad to be high?
• why are zero's sampled at the beginning, even when we write 32 bits of 1's with?

[badeaa3]

Important notes:

• We worked with Paul and at 10 MHz the signal integrity is ok
• We asked for a female interface at the DUT to directly connect to the level shifter
• The level shifter chip cannot handle 40 MHz with 0.9V on output