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asic-testing-fnal-lab-notebooks
Lab notebooks and git issues for testing
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Design Debrief
#29
Open
bparpillon
opened
1 month ago
bparpillon
commented
1 month ago
ANALOG
Add 1.8V IO ring with integrated level shifter
Charge injection
: in pixel generation
DIGITAL
RTL mapping consistency between scan chain and shift register
BIST access to the DNN would have been nice (inject bits)
DNN decode output with IDLE state - (
11
-> high pt ;
01
--> low pt >0 ;
10
low pt <0 ;
00
for IDLE) if adding the IDLE state doesn't cost too much.
Have a way to turn OFF the DNN
Do we really need DNW for digital ground?