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snes9xgit / snes9x

Snes9x - Portable Super Nintendo Entertainment System (TM) emulator
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Mecarobot Golf jumpy ground #429

Open ghost opened 6 years ago

ghost commented 6 years ago

Golf course sometimes shows jumpy, shaky behavior. Haven't checked bsnes debugger to see which one is correct but it's a visible off-by-1-line distortion.

frame 1: $00:9C7E A9 39 LDA #$39 A:0008 X:0008 Y:0120 D:0000 DB:00 S:01E8 P:envMxdIzc HC:1064 VC:122 FC:03 HV .n. HT:266 VT:122 C:357634 $00:9C80 8D 0C 42 STA $420C [$00:420C] A:0039 X:0008 Y:0120 D:0000 DB:00 S:01E8 P:envMxdIzc HC:1080 VC:122 FC:03 HV .n. HT:266 VT:122 C:357634 *** HDMA Transfer HC:1110, Channel:39 --- HDMA PPU 211B -> 6A --- HDMA PPU 211B -> 01 --- HDMA PPU 211E -> 6A --- HDMA PPU 211E -> 01 --- HDMA PPU 211C -> 18 --- HDMA PPU 211C -> 00 --- HDMA PPU 211D -> E8 --- HDMA PPU 211D -> FF

frame 2: $00:9C7E A9 39 LDA #$39 A:0008 X:0008 Y:0120 D:0000 DB:00 S:01E4 P:envMxdIzc HC:1070 VC:122 FC:04 HV .n. HT:266 VT:122 C:357630 $00:9C80 8D 0C 42 STA $420C [$00:420C] A:0039 X:0008 Y:0120 D:0000 DB:00 S:01E4 P:envMxdIzc HC:1086 VC:122 FC:04 HV .n. HT:266 VT:122 C:357630

*** hdma paused for line 122; resumes on line 123

$00:9C83 E6 DB INC $DB [$00:00DB] A:0039 X:0008 Y:0120 D:0000 DB:00 S:01E4 P:envMxdIzc HC:1116 VC:122 FC:04 HV .n. HT:266 VT:122 C:357630 $00:9C85 A9 40 LDA #$40 A:0039 X:0008 Y:0120 D:0000 DB:00 S:01E4 P:envMxdIzc HC:1154 VC:122 FC:04 HV .n. HT:266 VT:122 C:357630 $00:9C87 8D 07 42 STA $4207 [$00:4207] A:0040 X:0008 Y:0120 D:0000 DB:00 S:01E4 P:envMxdIzc HC:1170 VC:122 FC:04 HV .n. HT:266 VT:122 C:357630 $00:9C8A 9C 08 42 STZ $4208 [$00:4208] A:0040 X:0008 Y:0120 D:0000 DB:00 S:01E4 P:envMxdIzc HC:1200 VC:122 FC:04 HV .n. HT:266 VT:122 C:357630 $00:9C8D A5 D8 LDA $D8 [$00:00D8] A:0040 X:0008 Y:0120 D:0000 DB:00 S:01E4 P:envMxdIzc HC:1230 VC:122 FC:04 HV .n. HT:266 VT:122 C:357630 $00:9C8F 8D 09 42 STA $4209 [$00:4209] A:007C X:0008 Y:0120 D:0000 DB:00 S:01E4 P:envMxdIzc HC:1254 VC:122 FC:04 HV .n. HT:266 VT:122 C:357630 --- IRQ Timer HC:1278 VC:122 set 2994 cycles HTimer:1 Pos:0064->0266 VTimer:1 Pos:124->124

..

$00:A08F AD 13 00 LDA $0013 [$00:0013] A:0002 X:00E0 Y:0120 D:0000 DB:00 S:01F4 P:envMxdizc HC:1104 VC:123 FC:04 HV .n. HT:266 VT:124 C:1630 *** HDMA Transfer HC:1128, Channel:39 --- HDMA PPU 211B -> 6A --- HDMA PPU 211B -> 01 --- HDMA PPU 211E -> 6A --- HDMA PPU 211E -> 01 --- HDMA PPU 211C -> 18 --- HDMA PPU 211C -> 00 --- HDMA PPU 211D -> E8 --- HDMA PPU 211D -> FF

ghost commented 6 years ago

bsnes suggests frame 1 is wrong. hdma should begin on next line (123).

hdma enable = 0x00 009c7e lda #$39 A:0008 X:0008 Y:0003 S:01db D:0000 DB:00 nvMxdIzc V:122 H:1074 F:17 009c80 sta $420c [00420c] A:0039 X:0008 Y:0003 S:01db D:0000 DB:00 nvMxdIzc V:122 H:1090 F:17

hdma enable = 0x39 009c83 inc $db [0000db] A:0039 X:0008 Y:0003 S:01db D:0000 DB:00 nvMxdIzc V:122 H:1120 F:17 009c85 lda #$40 A:0039 X:0008 Y:0003 S:01db D:0000 DB:00 nvMxdIzc V:122 H:1158 F:17

..

00a092 bne $a08f [00a08f] A:0001 X:00a0 Y:0003 S:01eb D:0000 DB:00 nvMxdizC V:123 H:1102 F:18 ** hdma transfer 00a08f lda $0013 [000013] A:0001 X:00a0 Y:0003 S:01eb D:0000 DB:00 nvMxdizC V:123 H:1232 F:18

ghost commented 6 years ago

Here's what I've digged up so far.

bsnes debugger
1096 = 4212 h-blank = true
1109/1110 = hdma ??

009c7e lda #$39               A:0008 X:0008 Y:0003 S:01db D:0000 DB:00 nvMxdIzc V:122 H:1063 F:44
009c80 sta $420c     [00420c] A:0039 X:0008 Y:0003 S:01db D:0000 DB:00 nvMxdIzc V:122 H:1079 F:44
009c83 inc $db       [0000db] A:0039 X:0008 Y:0003 S:01db D:0000 DB:00 nvMxdIzc V:122 H:1109 F:44
== hdma
009c85 lda #$40               A:0039 X:0008 Y:0003 S:01db D:0000 DB:00 nvMxdIzc V:122 H:1257 F:44

009c7e lda #$39               A:0008 X:0008 Y:0003 S:01db D:0000 DB:00 nvMxdIzc V:122 H:1064 F:43
009c80 sta $420c     [00420c] A:0039 X:0008 Y:0003 S:01db D:0000 DB:00 nvMxdIzc V:122 H:1080 F:43
009c83 inc $db       [0000db] A:0039 X:0008 Y:0003 S:01db D:0000 DB:00 nvMxdIzc V:122 H:1110 F:43
== no hdma
009c85 lda #$40               A:0039 X:0008 Y:0003 S:01db D:0000 DB:00 nvMxdIzc V:122 H:1148 F:43

I don't fully get this. sta $420c has to finish before / exactly on hdma cycle trigger? I don't know exactly which cycle hdma begins in debugger.

snes9x svn

$00:9C7E A9 39       LDA #$39                A:0008 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1064 VC:122 FC:26  HV .n.    HT:266 VT:122 C:357630
$00:9C80 8D 0C 42    STA $420C  [$00:420C]   A:0039 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1080 VC:122 FC:26  HV .n.    HT:266 VT:122 C:357630
--- HC event processing  (HC_HBLANK_START_EVENT)  expected HC:1096  executed HC:1104 VC:0122
--- HC event rescheduled (HC_HDMA_START_EVENT  )  expected HC:1106  current  HC:1104
--- HC event processing  (HC_HDMA_START_EVENT  )  expected HC:1106  executed HC:1110 VC:0122
*** HDMA Transfer HC:1110, Channel:39
--- HDMA PPU 211B -> 6A
--- HDMA PPU 211B -> 01
--- HDMA PPU 211E -> 6A
--- HDMA PPU 211E -> 01
--- HDMA PPU 211C -> 18
--- HDMA PPU 211C -> 00
--- HDMA PPU 211D -> E8
--- HDMA PPU 211D -> FF
--- HC event rescheduled (HC_HCOUNTER_MAX_EVENT)  expected HC:1364  current  HC:1224
$00:9C83 E6 DB       INC $DB    [$00:00DB]   A:0039 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1224 VC:122 FC:26  HV .n.    HT:266 VT:122 C:357630
$00:9C85 A9 40       LDA #$40                A:0039 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1262 VC:122 FC:26  HV .n.    HT:266 VT:122 C:357630
$00:9C87 8D 07 42    STA $4207  [$00:4207]   A:0040 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1278 VC:122 FC:26  HV .n.    HT:266 VT:122 C:357630
$00:9C8A 9C 08 42    STZ $4208  [$00:4208]   A:0040 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1308 VC:122 FC:26  HV .n.    HT:266 VT:122 C:357630
$00:9C8D A5 D8       LDA $D8    [$00:00D8]   A:0040 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1338 VC:122 FC:26  HV .n.    HT:266 VT:122 C:357630
$00:9C8F 8D 09 42    STA $4209  [$00:4209]   A:007C X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1362 VC:122 FC:26  HV .n.    HT:266 VT:122 C:357630

$00:9C7E A9 39       LDA #$39                A:0008 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1068 VC:122 FC:23  HV .n.    HT:266 VT:122 C:357634
$00:9C80 8D 0C 42    STA $420C  [$00:420C]   A:0039 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1084 VC:122 FC:23  HV .n.    HT:266 VT:122 C:357634
--- HC event processing  (HC_HBLANK_START_EVENT)  expected HC:1096  executed HC:1108 VC:0122
--- HC event rescheduled (HC_HDMA_START_EVENT  )  expected HC:1106  current  HC:1108
--- HC event processing  (HC_HDMA_START_EVENT  )  expected HC:1106  executed HC:1108 VC:0122
--- HC event rescheduled (HC_HCOUNTER_MAX_EVENT)  expected HC:1364  current  HC:1108
$00:9C83 E6 DB       INC $DB    [$00:00DB]   A:0039 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1114 VC:122 FC:23  HV .n.    HT:266 VT:122 C:357634
$00:9C85 A9 40       LDA #$40                A:0039 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1152 VC:122 FC:23  HV .n.    HT:266 VT:122 C:357634
$00:9C87 8D 07 42    STA $4207  [$00:4207]   A:0040 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1168 VC:122 FC:23  HV .n.    HT:266 VT:122 C:357634
$00:9C8A 9C 08 42    STZ $4208  [$00:4208]   A:0040 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1198 VC:122 FC:23  HV .n.    HT:266 VT:122 C:357634
$00:9C8D A5 D8       LDA $D8    [$00:00D8]   A:0040 X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1228 VC:122 FC:23  HV .n.    HT:266 VT:122 C:357634
$00:9C8F 8D 09 42    STA $4209  [$00:4209]   A:007C X:0008 Y:0003 D:0000 DB:00 S:01DF P:envMxdIzc HC:1252 VC:122 FC:23  HV .n.    HT:266 VT:122 C:357634

So I guess this generally works correctly but hdma trigger is slightly off? Or maybe install game specific hack if there's other frisky hdma games?

I'm more than a bit confused atm as to the exact timing how hdma works. :|

OV2 commented 6 years ago

You could experiment by changing the HDMA timing with the HDMATiming setting in the conf file ([Hack] section). 100 is the default, larger will delay it, smaller will trigger earlier.

bearoso commented 6 years ago

If HDMA is occurring too early, it's because our cycle accounting is letting it enable HDMA before HDMA start when it should enable it afterward and miss it on line 122.

Snes9x schedules HDMA start at 1106. We need to change this to to correct 1112 which bsnes/higan uses. This would also make the problem worse.

What should be done is to follow the execution from the IRQ and check the number of cycles each opcode is taking and compare it to a trace of bsnes. Something is executing more quickly that it should.

bearoso commented 6 years ago

Scratch that. I think it's IRQ again. HTimer delay is 3.5 dot clocks. So Timings.IRQTriggerCycles should be 4 master cycles greater in most cases. It's only when VTimer alone is enabled that the check is executed on HPos=Max and we can shave off those 4 cycles.

bearoso commented 6 years ago

Commit c61d81269a16ba045bddcc98716b4391ac317184 fixes it for now. But if we ever change HDMA start to 1112 like it's supposed to be it'll break. So it might be good to check our opcodes.

bearoso commented 6 years ago

The game starts a chain of IRQs at VC=120 HC=256. This will trigger at HC=270. bsnes/higan lets one more opcode go at HC=272 (after the trigger), like we experimented with doing in Snes9x a little while ago. Subsequent IRQs trigger immediately after one another, so this initial timing is what affects the HDMA set ultimately. Bumping the HTIMER offset fixes the game for now, but we'll have to take another look at the IRQ delay timing.

ghost commented 6 years ago

Wow, that's seriously wicked. Thanks for explaining all that.

bearoso commented 6 years ago

It still wobbles a bit randomly even after the correct delay for HTimer, so it's not fixed yet.