Added support for adjusting PIO timing related to interfacing with Oric. Accessible via the monitor command and stored in CONFIG.SYS on internal flash. Unit for the timing is number of LOCI cycles, typically 8.33ns. These adjustmetns are additional delay on top of basic delay is already present in the PIO programs.
set tmap <0-31> ; cycles before asserting MAP signal. Default 10.
set tior <0-31> ; cycles before IO address and R/W is sampled after PHI2 goes low. Default 0.
set tiow <0-31> ; cycles before IO write data is sampled after PHI2 goes high. Default 0.
set tiod <0-7> ; cycles before IO read data is driven on the bus after PHI2 goes high. Default 0.
set tadr <0-7> ; cycles before ROM address and R/W is sampled after PHI2 goes low. Default 0.
MAP tuning is also exposed on the API to allow Oric ROMs to adjust it.
Added support for adjusting PIO timing related to interfacing with Oric. Accessible via the monitor command and stored in CONFIG.SYS on internal flash. Unit for the timing is number of LOCI cycles, typically 8.33ns. These adjustmetns are additional delay on top of basic delay is already present in the PIO programs.
MAP tuning is also exposed on the API to allow Oric ROMs to adjust it.