Closed softerhardware closed 9 years ago
For flexibility, the AD9866 SPI bus was jumpered to the FPGA via P1 and P17. This should be hardwired.
Plan is to hardwire in Rev 1.1.
Done.
For flexibility, the AD9866 SPI bus was jumpered to the FPGA via P1 and P17. This should be hardwired.