Some small updates to the TX envelope PWM code: one is to solve the synchronization issue mentioned here, by increasing the EER_req width to 4 clock cycles. In theory it should be possible to use clk_2x for the EER interpolation FIR and reduce the EER_req width to 2 but I quickly tried and it didn't work, probably because timing would need some adjustment.
As before, to enable the PWM code, hermeslite.v should be modified to set LRDATA=2 and NR=3.
I wondered if the EER-enabled gateware creation could be automated via the Makefile but I'm not so familiar with that, so I'll leave that for later...
I've rebased on the latest commit and checked that make still complies the various revisions. A quick check on my H-Lv2b8 with linhpsdr shows the expect PWM output.
As discussed offline, I'll merge this PR then.
Some small updates to the TX envelope PWM code: one is to solve the synchronization issue mentioned here, by increasing the
EER_req
width to 4 clock cycles. In theory it should be possible to useclk_2x
for the EER interpolation FIR and reduce theEER_req
width to 2 but I quickly tried and it didn't work, probably because timing would need some adjustment.As before, to enable the PWM code,
hermeslite.v
should be modified to setLRDATA=2
andNR=3
.I wondered if the EER-enabled gateware creation could be automated via the Makefile but I'm not so familiar with that, so I'll leave that for later...