Closed in3otd closed 7 years ago
I may have missed something but why did you move this to "Firmware"? My understanding was that you cannot control the pin status during configuration - the docs say "The user I/O pins and dual-purpose I/O pins have weak pull-up resistors, which are always enabled (after POR) before and during configuration".
Yes, you are right. I didn't pay close attention when reading this initially. There are also some sequencing changes that need to be made in the firmware.
Resistors R124, R125, R126 added to beta3 schematic.
Done on PCB.
In the H-L v2b2 the TX relay toggles at power-up, while the FPGA is being configured. Similarly, the bias source for the PA, U14, is briefly enabled. May not be harmful but would be good to add a pull down (as R125, which should likely be mounted by default). I find the relay clicking a bit annoying because it makes the user think that the unit went into TX unexpectedly.