Refactoring of RAM

[b-scholz]

The RAM intermediate representation needs to be refactored. We should aim to apply the same design patterns as in AST, i.e., prototype pattern and subscriber mechanism for analyses, and transformers. In addition, the intermediate representation should be separated from the operations on it (e.g., levelling). We should have a transformer pipeline similar to the AST, i.e., RAM should mimic a similar design like the AST of Souffle.

• Tidy-up class description and add prototype boilerplate code (done)

• RamRelation needs to be split into a reference and a relation declaration, and remove RamCreate (done)

• RamTranslationUnit is to be generated by the AST Translator (done)

• Introduce RAM transformer for converting simple RAM scans to indexed expressions (done)

• Introduce RAM transformers for levelling (placing conditions at the most outer looper so that the semantic is not violated) (done)

• Introduce RAM analyses for indexing (done)

• Introduce semantic checker for RAM as a RAM Transformer

• Adapting Interpreter and Synthesiser (done)

[b-scholz]

This is our battle-plan for the refactoring so that we can perform correctness checks after each step:

(1) IndexMap should become a RamAnalysis (done)

(2) Differentiate between a RamScan with Index and without Index as proper RAM Classes

(3) Write a transformer that translates RamScan without Index to RamScan with Index, and remove detection of Indexed/Non-indexed searches from AstTranslator.

(4) Remove Levelling (getDepth() / getLevel()) from RAM (addCondition etc.) and perform Levelling as a RamTransformer

(5) Have a list of RamRelation Declarations defining properties of RamRelation and actual use of relations in RamStatements are referring to RamRelations by own RamRelationRef object (done)

(6) Tidy up some quirks in Ram IR / make interfaces uniform / check naming conventions

(7) Rewrite AstTranslator (partially done)

[brofranks]

This is a list of some remaining items that need to be done:

• [x] Fix RAM print output
• [x] Simplify RamOperations (already started / continue this work)
• [x] Rename references to a loop ‘level’ to tuple ‘identifier’ (e.g. in RamElementAccess "getLevel()")
• [x] Have a uniform interface for argument arrays such as in Pack etc. ; we have different ways to access arrays of RamValues.
• [x] Tidy up some quirks in Ram IR / make interfaces uniform / check naming conventions / class descriptions
• [x] Remove RamCreate operation
• [x] Add prototype boilerplate code for RAM transforms
• [x] Introduce semantic checker for RAM as a RAM Transformer
• [ ] Rewrite / simplify AstTranslator
• [ ] SMT Solver for making Index operations faster
• [x] RamElementAccess: add a pointer to the RamRelation so that attribute types / names can be accessed rather than duplicating the information (Have a look how references in RamRelationRef work).

[mmcgr]

What is needed for "Fix RAM print output"? I don't see a problem, other than RamCreate has a TODO to add type info - which would clash with 'Remove RamCreate operation'.

[mmcgr]

Ram print methods have some formatting and style issues that hinder readability. debug output for a more complicated program will demonstrate the issue.

[b-scholz]

Let's remove the RAM semantic checker.
The only reason why we would like to have it is to check the correctness of the translation / transformers. Let's leave this as future work.

Also, the SMT solver / constraint simplifier would only be useful if there were use cases that could profit from the simplifications. This is not clear to me at the moment.

I am inclined to fix as many issues as possible related to RAM representation.

Let's defer some remaining issues to a new issue. This issue becomes convoluted!

[b-scholz]

We need more RAM Representation fixes...

[mmcgr]

• [x] RamValue -> RamExpression
• [x] RamLookup -> RamRecordUnpack
• [ ] RamAggregates derived from RamRelationSearch
• [x] disallow null pointers caused by temp tables (e.g AstTranslator)
• [x] remove isConstant/getLevel/ replace with rcva/rcla